TAIPEI (Taiwan News) — Taiwan–Japan cooperation on advanced chip manufacturing could be a win-win and more efficient than similar projects in the US, Chung-Hua Institution for Economic Research President Lien Hsien-ming (連賢明) said Thursday.
Lien said the move would ease geopolitical risks for foreign investors and take advantage of similar work cultures in Taiwan and Japan, per CNA. He added that operations in Japan could run more smoothly and face fewer labor shortages than in the US.
The remarks came after TSMC signaled plans to shift its second wafer fab in Kumamoto, Japan, to 3 nm production, responding to surging AI-driven chip demand.
TSMC CEO and Chair C.C. Wei (魏哲家) met Japanese Prime Minister Takaichi Sanae on Thursday to discuss the company’s investment plans. The meeting came as global demand for advanced chips continues to rise, driven by AI applications.
TSMC said it is evaluating whether its second wafer fab under construction in Kumamoto Prefecture could adopt 3 nm process technology. The plant was planned to produce 6 nm chips.
Lien said he had discussed the plan with semiconductor experts in both countries, who agreed that 3 nm production in Kumamoto would be more efficient than expected. He cited cultural and work-style similarities as key advantages for productivity.
TSMC is building wafer fabs in Kumamoto with partners including Sony. The first plant began mass production at the end of 2024 and construction of the second fab is already underway.
The company has not finalized the plan but confirmed it is under evaluation.
