TAIPEI (Taiwan News) — Tech executives said Tuesday that surging AI demand is pushing chip design and cooling technologies to their limits.

At the Semicon Network Summit in Taipei, MediaTek President and COO Chen Kuang-chou (陳冠州) said AI chips face different challenges in cloud and edge devices, per CNA. Smartphones, for example, have strict power and bandwidth limits, requiring more efficient designs to handle AI inference.

He added that future solutions will rely on integrating multiple dies through advanced 2.5D and 3D packaging. While collaboration with partners is key, MediaTek plans to develop critical technologies in-house.

AMD Senior Technical Director Su Ti-hsi (蘇迪希) highlighted that higher transistor densities mean more heat, making system-on-a-chip design, power delivery, and advanced cooling essential. He noted that cooling is shifting from air-based to liquid-based solutions to meet AI workloads.

Cadence Vice President of R&D Don Chan said AI chip development now goes beyond traditional system-on-a-chip design to process optimization, with some chips integrating up to 200 billion transistors. He said engineers must account for chip physics and heat and adopt new analytical approaches.

Chan added that AI tools, including large language models, are increasingly used in chip design to accelerate development. He praised Taiwan’s strong foundry ecosystem, saying it positions the island as a key hub for future AI chip innovation.